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Machine Learning on 2nd Generation Intel® Xeon Phi™ Processors: Image Captioning with NeuralTalk2, Torch

June 20, 2016 // 9 Comments

In this case study, we describe a proof-of-concept implementation of a highly optimized machine learning application for Intel Architecture. Our results demonstrate [...]
Heterogeneous Clustering with Homogeneous Code: Accelerate MPI Applications Without Code Surgery Using Intel Xeon Phi Coprocessors

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Slide Deck for Colfax Developer Training on Parallel Programming

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Installing Intel MPSS 3.3 in Arch Linux

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Optimization Techniques for the Intel MIC Architecture. Part 1 of 3: Multi-Threading and Parallel Reduction

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HOW Series “Deep Dive”: Webinars on Performance Optimization – 2017 Edition

June 30, 2017 // 0 Comments

Register Why Attend Roadmap Instructor Prerequisites Cluster Materials Book In a Nutshell HOW Series “Deep Dive” is a free Web-based training on parallel [...]
Hands-on Developer Training at Rice University

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Auto-Vectorization with the Intel Compilers: is Your Code Ready for Sandy Bridge and Knights Corner?

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Intel® Python* on 2nd Generation Intel® Xeon Phi™ Processors: Out-of-the-Box Performance

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Meet us at SC15

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