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June 20, 2016 // 9 Comments
Heterogeneous Clustering with Homogeneous Code: Accelerate MPI Applications Without Code Surgery Using Intel Xeon Phi Coprocessors
5 Comments
Slide Deck for Colfax Developer Training on Parallel Programming
3 Comments
Installing Intel MPSS 3.3 in Arch Linux
Optimization Techniques for the Intel MIC Architecture. Part 1 of 3: Multi-Threading and Parallel Reduction
May 13, 2016 // 0 Comments
Multithreaded Transposition of Square Matrices with Common Code for Intel Xeon Processors and Intel Xeon Phi Coprocessors
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Colfax Research papers translated to Japanese
Optimization Techniques for the Intel MIC Architecture. Part 3 of 3: False Sharing and Padding
Scientific Computing in a Web Browser: GALPROP WebRun
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