Colfax Developer Training at the University of Chicago

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Thursday, August 3, 2017
9:30 am - 4:00 pm

University of Chicago - John Crerar Library
5730 S Ellis Ave, Chicago, IL, 60637, Kathleen A. Zar Room 140

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High-Performance Computing and Data Analytics: Programming Intel Architecture with C/C++ and Python

Intel and Colfax International are offering an updated and expanded hands-on training on code modernization for researchers and engineers in computational disciplines. This training provides the foundation needed to extract more of the parallel compute performance potential found in both Intel® Xeon® and Intel® Xeon Phi™ processors and coprocessors. The course materials and practical exercises are appropriate for developers beginning their journey to parallel programming, with enough detail to also cater to high-performance computing experts.

The training is conducted by Colfax International.
Registration is open to everyone free of charge thanks to Intel’s sponsorship.

Hands-On Component

Colfax Developer Training is far more than a lecture – it is an experiential learning program. That is because the training contains hands-on component in two forms:

  1. The instructor will demonstrate the methods taught in the course live, on servers with the latest Intel Xeon and Intel Xeon Phi processors.
  2. Attendees will receive remote access to these training servers for 1 day and a set of programming and optimization exercises.

Bring your own laptop to take advantage of this opportunity.


 Colfax-Chicago-08-17-Slides.pdf (12 MB) — this file is available only to registered users. Register or Log In.


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  • Registration, light breakfast (9:30 – 10:00 am)
  • Morning session (10:00 am – 1:00 pm)

    • Sneak Peak: What will be covered today (30 min)
    • Programming and Optimization by Example (2.5 hours)
      • Demonstration of a case study: direct N-body simulation
      • Intel processor architectures
      • Task and data parallelism
      • Memory organization
      • Programming coprocessors and clusters
  • Lunch (1:00 pm – 1:30 pm)
  • Afternoon session (1:30 pm – 4:00 pm)

    • Optimization Pointers (1 hour)
      • Scalar tuning and using Intel compilers
      • Automatic vectorization
      • Multi-threading with OpenMP
      • Optimizing cache usage and memory access
      • Communication control
    • Preparing for Intel Xeon Phi processors (30 min)
      • Compiling with AVX-512
      • Using high-bandwidth memory
      • Leveraging clustering modes
    • Intel Libraries (20 min)
      • Intel Math Kernel Library (MKL): numerical methods
      • Intel Data Analytics Acceleration Library (DAAL): machine learning
    • Intel Distribution for Python (20 min)
      • Brief intro to Intel Python (where to get it, installation, etc.)
      • Discussing numpy, scipy and link with Intel MKL
      • How to get the most out of numpy and scipy
    • Intel-Optimized Deep Learning Frameworks (20 min)
      • Deep learning frameworks in data analytics
      • How to obtain Intel-optimized frameworks
      • Deep neural networks on Intel Architecture in action


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This event is fully booked.